
6
5
4
3
2
1
REVISION RECORD
RESET_IN
LTR
ECO NO:
APPROVED:
DATE:
BMODE1_B
D
PF9/PPI_D9/RSCLK1/SPISEL6
PF10/PPI_D10/RFS1/SPISEL7
PF15/PPI_D15/DR1SEC/UART1RX/TACI3
Future Use
Future Use
SPORT_RSCLK
SPORT_RFS
SPORT_DR0
SPORT_DR1
SPORT_DR2
SPORT_DR3
DIR=1: A->B; DIR=0: B->A
D[23:16] (Future Use)
D
PF13/PPI_D13/TSCLK1/SPISEL3/CUD
PF11/PPI_D11/TFS1/CZM
PF12/PPI_D12/DT1PRI/SPISEL2/COG
PF14/PPI_D14/DT1SEC/UART1TX
Future Use
Future Use
SPORT_TSCLK
SPORT_TFS
SPORT_DT0
SPORT_DT1
SPORT_DT2
SPORT_DT3
CONB_PAR_D[0:15]
PG14/TSCLK0A1/MOC
SPORT_INT
C
PH9/SPISEL5/ETXD2/TACLK3
PF10/PPI_D10/RFS1/SPISEL7
PF13/PPI_D13/TSCLK1/SPISEL3/CUD
SPI_SEL_A
SPI_SEL_B
SPI_SEL_C
SPI_SEL1/SPI_SS
SPI_MOSI
SPI_MISO
SPI_CLK
C
B
PG15/TFS0A/MII_PHYINT/RMII_MDINT
PG8/TMR4/RFS0A/UART0RX/TACI4
PG7/TMR3/DR0PRIA/UART0TX
SDA_0
SCL_0
SDA_1
SCL_1
UART_RX
UART_TX
PF4/PPI_D4/TFS0/TACLK0
PF5/PPI_D5/TSCLK0/TACLK1
PF6/PPI_D6/DT0SEC/TACI0
PF7/PPI_D7/DR0SEC/TACI1
PF9/PPI_D9/RSCLK1/SPISEL6
PF10/PPI_D10/RFS1/SPISEL7
PF11/PPI_D11/TFS1/CZM
PF12/PPI_D12/DT1PRI/SPISEL2/COG
PF13/PPI_D13/TSCLK1/SPISEL3/CUD
PF14/PPI_D14/DT1SEC/UART1TX
PF15/PPI_D15/DR1SEC/UART1RX/TACI3
PG13/UART1RXA/TACI2
PAR_RD
PAR_WR
PAR_CS
PAR_INT
PAR_A3
PAR_A2
PAR_A1
PAR_A0
B
PG6/DT0PRIA/TMR2/PPI_FS3
PAR_FS3
PAR_FS2
GPIO_0
GPIO_1
GPIO_2
PAR_FS1
PAR_CLK
GPIO_3
GPIO_4
GPIO_5
GPIO_6
Future Use
ANALOG DEVICES
SYSTEM DEMONSTRATION PLATFORM
A
PG8/TMR4/RFS0A/UART0RX/TACI4
PG6/DT0PRIA/TMR2/PPI_FS3
Future Use
GPIO_7
TMR_A
TMR_B
TMR_C
TMR_D
DRAWN:
CHECKED:
DATED:
13-01-09
DATED:
14-01-10
COMPANY:
TITLE:
CODE: SIZE: DRAWING NO: REV:
(CONNECTOR B)
A
QUALITY CONTROL:
RELEASED:
DATED:
DATED:
SCALE:
SDP1Z
SHEET: 6 OF 6
B